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this is information on a product in full production. june 2012 doc id 023310 rev 1 1/23 1 st2149b 4-bit dual supply level translator without direction control pin datasheet ? production data features 45 mhz: 90 mbps (max.) data rate at v l = 1.8 v, v cc = 3.3 v bi-directional level translation without direction control pin wide voltage range (v l v cc ): ?v l ranges from 1.65 to 3.6 v ?v cc ranges from 1.65 to 5.5 v totem-pole driving 5.5 v tolerant enable pin esd performance on all pins: 2 kv hbm small package and footprint qfn12 (1.7 x 2.0 mm) applications low-voltage system level translation mobile phones and other mobile devices table 1. device summary order code package packing package topmark ST2149BQTR qfn12 (1.7 x 2.0 mm) tape and reel (3000 parts per reel) 49a qfn12 (1.7 x 2.0 mm) www.st.com
contents st2149b 2/23 doc id 023310 rev 1 contents 1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 device block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 supplementary notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.1 driver requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.2 load driving capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.3 truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7 test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 st2149b list of tables doc id 023310 rev 1 3/23 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 4. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 5. recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 6. dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 7. ac characteristics - test conditions: v l = 1.65 - 1.95 v . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 8. ac characteristics - test conditions: v l = 2.3 - 2.7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 9. ac characteristics - test conditions: v l = 3.0 - 3.6 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 10. test circuit switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 11. waveform symbol value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 12. mechanical data for qfn12 (1.7 x 2.0 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . . . . . 19 table 13. carrier tape dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 14. reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 15. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 list of figures st2149b 4/23 doc id 023310 rev 1 list of figures figure 1. pin connection (top through view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. logic block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 3. ST2149BQTR block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. application block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 5. test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 6. waveform - propagation delay (f = 1 mhz, 50% duty cycle). . . . . . . . . . . . . . . . . . . . . . . . 17 figure 7. waveform - output enable and disable time (f = 1 mhz, 50% duty cycle) . . . . . . . . . . . . . 17 figure 8. package outline for qfn12 (1.7 x 2.0 mm) - 0.40 mm pitch. . . . . . . . . . . . . . . . . . . . . . . . 18 figure 9. carrier tape for qfn12 (1.7 x 2.0 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 10. reel information for qfn12 (1.7 x 2.0 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . . . . . 21 st2149b description doc id 023310 rev 1 5/23 1 description the st2149b is a 4-bit dual supply level translator which provides the level shifting capability to allow data transfer in a mult i-voltage system. externa lly applied voltages, v cc and v l , set the logic levels on either side of the device. its architecture allows bi-directional level translation without a control pin. the st2149b accepts v l from 1.65 to 3.6 v and v cc from v l to 5.5 v, making it ideal for data transfer between low-voltage asics/pld and higher voltage systems. this device has a tri-state output mode which can be used to disable all i/os. pin settings st2149b 6/23 doc id 023310 rev 1 2 pin settings 2.1 pin connection figure 1. pin connection (top through view) 2.2 pin description ) / 6 # # ) / 6 # # ) / 6 , 6 , 6 # # ) / 6 # # ) / 6 , / % ) / 6 , ) / 6 , / ) 6 # # ' . $ ! - 6 table 2. pin description pin number symbol name and function 1v l supply voltage 2i/o vl1 data input/output 3i/o vl2 data input/output 4i/o vl3 data input/output 5i/o vl4 data input/output 6 gnd ground 7i/o vcc4 data input/output 8i/o vcc3 data input/output 9i/o vcc2 data input/output 10 i/o vcc1 data input/output 11 v cc supply voltage 12 oe output enable st2149b logic diagram doc id 023310 rev 1 7/23 3 logic diagram figure 2. logic block diagram device block diagrams figure 3. ST2149BQTR block diagram 1. when oe is low, all i/os are in high-impedance mode. 2. ST2149BQTR has 4 channels. for simplicity, the above diagram shows only 1 channel. st2149 ! - 6 o n e s h o t c i r c u i t b l o c k 6 # # 6 , k k ) / 6 # # ) / 6 , / % logic diagram st2149b 8/23 doc id 023310 rev 1 figure 4. application block diagram ! - 6 6 , 6 # # / % ) / 6 , ) / 6 # # ) / 6 , ) / 6 # # 6 , s y s t e m c o n t r o l l e r s y s t e m c o n t r o l l e r 6 , 6 # # ) / 6 , ) / 6 , ) / 6 # # ) / 6 # # 6 # # st2149b supplementary notes doc id 023310 rev 1 9/23 4 supplementary notes 4.1 driver requirement for proper operation, the driver from each side of the device must be able to source and sink a minimum of 1 ma current. the device architecture requires the driver to source/sink maximum current of (v cc /4) ma to/from the weak 4 k output buffer. 4.2 load driving capability to support the architecture that allows level translation without the direction pin, the one-shot transistor is turned on only during state transition at the output side. after the one-shot transistor is turned off, only the 4 k resistor maintains the output logic state. so, a resistive load or pull-up resistor less than 50 k is not recommended for proper operation. 4.3 truth table table 3. truth table enable bi-directional input/output oe i/o vcc i/o vl h (1) 1. high level v l power supply referred. h (2) 2. high level v cc power supply referred. h (1) h (1) ll lz (3) 3. z = high impedance. z (3) maximum ratings st2149b 10/23 doc id 023310 rev 1 5 maximum ratings stressing the device above the ratings listed in table 4 may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in recommended operating conditions of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. recommended operating conditions table 4. absolute maximum ratings symbol parameter value unit v l supply voltage -0.3 to 4.6 v v cc supply voltage -0.3 to 6.5 v v oe dc control input voltage -0.3 to 6.5 v v i/ovl dc i/o vl input voltage (oe = gnd or v l ) -0.3 to v l + 0.3 v v i/ovcc dc i/o vcc input voltage (oe = gnd or v l ) -0.3 to v cc + 0.3 v i ik dc input diode current -20 ma i i/ovl dc output current 25 ma i i/ovcc dc output current 25 ma i sctout short-circuit duration, continuous 40 ma p d power dissipation 500 mw t stg storage temperature -65 to 150 c t l lead temperature (10 seconds) 300 c esd electrostatic discharge protection (hbm) 2 kv table 5. recommended operating conditions symbol parameter min. typ. max. unit v l supply voltage 1.65 ? 3.6 v v cc supply voltage v l ?5.5v v oe input voltage (oe output enable pin, v l power supply referred) 0?3.6v v i/ovl i/o vl voltage 0 ? v l v v i/ovcc i/o vcc voltage 0 ? v cc v t op operating temperature -40 ? 85 c dt/dv input rise and fall time 0 ? 1 ns/v st2149b electrical characteristics doc id 023310 rev 1 11/23 6 electrical characteristics over recommended operating conditions unless otherwise noted. all typical values are at t a = 25 c. table 6. dc characteristics symbol parameter v l v cc test conditions value unit t a = 25 c -40 to 85 c min. typ. max. min. max. v ihl high-level input voltage (i/o vl ) 1.65 to 3.6 v l to 5.5 0.8 v l ? ? 0.8 v l ? v v ill low-level input voltage (i/o vl ) 1.65 to 3.6 v l to 5.5 ?? 0.2 v l ?0.2 v l v v ihc high-level input voltage (i/o vcc ) 1.65 to 3.6 v l to 5.5 0.8 v cc ??0.8 v cc ? v v ilc low-level input voltage (i/o vcc ) 1.65 to 3.6 v l to 5.5 ? ? 0.2 v cc ? 0.2 v cc v v ih-oe high-level input voltage (oe) 1.65 to 3.6 v l to 5.5 0.8 v l ? ? 0.8 v l ?v v il-oe low-level input voltage (oe) 1.65 to 3.6 v l to 5.5 ? ? 0.2 v l ? 0.2 v l v v ohl high-level output voltage (i/o vl ) 1.65 to 3.6 v l to 5.5 io = -60 a v l - 0.4 ? ? v l - 0.4 ? v v oll low-level output voltage (i/o vl ) 1.65 to 3.6 v l to 5.5 io = +60 a ? ? 0.4 ? 0.4 v v ohc high-level output voltage (i/o vcc ) 1.65 to 3.6 v l to 5.5 io = -60 a v cc - 0.4 ? ? v cc - 0.4 ?v v olc low-level output voltage (i/o vcc ) 1.65 to 3.6 v l to 5.5 io = +60 a ? ? 0.4 ? 0.4 v i oe control input leakage current (oe) 1.65 to 3.6 v l to 5.5 v i = gnd or v l ??0.1 ? 1a electrical characteristics st2149b 12/23 doc id 023310 rev 1 i io_lkg high impedance leakage current (i/o vl , i/o vcc ) 1.65 to 3.6 v l to 5.5 oe = gnd i/o vl = high i/o vcc = low ??0.1 ? 1a oe = gnd i/o vl = low i/o vcc = high ??0.1 ? 1a i qvcc quiescent supply current v cc 1.65 to 3.6 v l to 5.5 oe = v l ?- ? 7 ? 9 a i qvl quiescent supply current v l 1.65 to 3.6 v l to 5.5 oe = v l ??0.1 ? 1a i z-vcc high impedance quiescent supply current v cc 1.65 to 3.6 v l to 5.5 oe = gnd i/o = hi-z ??0.1 ? 1a i z-vl high impedance quiescent supply current v l 1.65 to 3.6 v l to 5.5 oe = gnd i/o = hi-z ??0.1 ? 1a table 6. dc characteristics (continued) symbol parameter v l v cc test conditions value unit t a = 25 c -40 to 85 c min. typ. max. min. max. st2149b electrical characteristics doc id 023310 rev 1 13/23 ac characteristics load c l = 15 pf; driver t r = t f 6 ns over temperature range -40 c to 85 c. table 7. ac characteristics - test conditions: v l = 1.65 - 1.95 v symbol parameter v cc = v l -1.95 v v cc = 2.3-2.7 v v cc = 3.0-3.6 v v cc = 4.5-5.5 v unit min. max. min. max. min. max. min. max. t rvcc rise time i/o vcc - 5.2 - 3.2 - 2.4 - 1.8 ns t fvcc fall time i/o vcc - 3.2 - 1.5 - 1.3 - 1.2 ns t rvl rise time i/o vl - 3.3 - 3.3 - 3.3 - 3.3 ns t fvl fall time i/o vl - 1.5 - 1.4 - 1.4 - 1.3 ns t i/ovl-vcc propagation delay time i/o vl-lh to i/o vcc-lh t plh - 7.6 - 5.8 - 5.0 - 4.4 ns i/o vl-hl to i/o vcc-hl t phl - 4.6 - 3.9 - 3.9 - 3.5 ns t i/ovcc-vl propagation delay time i/o vcc-lh to i/o vl-lh t plh - 7.1 - 6.6 - 4.8 - 4.6 ns i/o vcc-hl to i/o vl-hl t phl - 5.3 - 5.1 - 4.3 - 4.1 ns t pzl output enable time t pzl - 28 - 28 - 28 - 28 ns t pzh output enable time t pzh - 90 - 90 - 90 - 90 ns t plz output disable time t plz 120 - 120 - 120 - 120 ns t phz output disable time t phz 80 - 60 - 50 - 50 ns d r data rate (1) 56 - 90 - 90 - 90 - mbps 1. data rate is guaranteed based on the condition that output i/o signal rise/fall time is less than 15% of period of input i/o signal; input i/o signal is at 50% duty cycle and output i/o signal duty cycle deviation is less than 50% 10%. electrical characteristics st2149b 14/23 doc id 023310 rev 1 table 8. ac characteristics - test conditions: v l = 2.3 - 2.7 v symbol parameter v cc = v l -2.7 v v cc = 3.0-3.6 v v cc = 4.5-5.5 v unit min. max. min. max. min. max. t rvcc rise time i/o vcc - 3.3 - 2.2 - 1.7 ns t fvcc fall time i/o vcc - 1.7 - 1.6 - 1.4 ns t rvl rise time i/o vl - 2.2 - 2.2 - 1.9 ns t fvl fall time i/o vl - 1.3 - 1.2 - 1.2 ns t i/ovl-vcc propagation delay time i/o vl-lh to i/o vcc-lh t plh - 4.8 - 4.3 - 3.9 ns i/o vl-hl to i/o vcc-hl t phl - 3.7 - 3.3 - 2.9 ns t i/ovcc-vl propagation delay time i/o vcc-lh to i/o vl-lh t plh - 3.9 - 3.5 - 3.5 ns i/o vcc-hl to i/o vl-hl t phl - 3.6 - 3.5 - 3.4 ns t pzl output enable time t pzl -25-25-25ns t pzh output enable time t pzh - 100 - 100 - 70 ns t plz output disable time t plz -90-90-90ns t phz output disable time t phz -50-50-50ns d r data rate (1) 90 - 136 - 158 - mbps 1. data rate is guaranteed based on the condition that output i/o signal rise/fall time is less than 15% of period of input i/o signal; input i/o signal is at 50% duty cycle and output i/o signal duty cycle deviation is less than 50% 10%. st2149b electrical characteristics doc id 023310 rev 1 15/23 table 9. ac characteristics - test conditions: v l = 3.0 - 3.6 v symbol parameter v cc = v l -3.6 v v cc = 4.5-5.5 v unit min. max. min. max. t rvcc rise time i/o vcc - 2.1 - 1.7 ns t fvcc fall time i/o vcc - 1.3 - 1.3 ns t rvl rise time i/o vl - 1.6 - 1.5 ns t fvl fall time i/o vl - 1.1 - 1.1 ns t i/ovl-vcc propagation delay time i/o vl-lh to i/o vcc-lh t plh - 4.1 - 4.1 ns i/o vl-hl to i/o vcc-hl t phl - 2.9 - 2.6 ns t i/ovcc-vl propagation delay time i/o vcc-lh to i/o vl-lh t plh - 4.0 - 4.0 ns i/o vcc-hl to i/o vl-hl t phl - 2.6 - 2.5 ns t pzl output enable time t pzl -15-15ns t pzh output enable time t pzh -70-15ns t plz output disable time t plz -70-70ns t phz output disable time t phz -50-50ns d r data rate (1) 144 - 186 - mbps 1. data rate is guaranteed based on the condition that output i/o signal rise/fall time is less than 15% of period of input i/o signal; input i/o signal is at 50% duty cycle and output i/o signal duty cycle deviation is less than 50% 10%. test circuit st2149b 16/23 doc id 023310 rev 1 7 test circuit figure 5. test circuit table 10. test circuit switches test c l r 1 switch t plh, t phl 15 pf 20 k open t r , t f 15 pf 20 k open t pzl, t plz 15 pf 20 k v l or v cc t pzh, t phz 15 pf 20 k gnd table 11. waveform symbol value symbol driving i/o vl driving i/o vcc 1.65 v v l v cc 2.5 v 3.3 v v l v cc 5.5 v 1.65 v v l v cc 2.5 v 3.3 v v l v cc 5.5 v v ih v l v l v cc v cc v im 50% v l 50% v l 50% v cc 50% v cc v om 50% v cc 50% v cc 50% v l 50% v l am040 8 0v1 p u l s e gener a tor d.u.t c l v l v cc open gnd v cc v l r 1 st2149b test circuit doc id 023310 rev 1 17/23 figure 6. waveform - propagation delay (f = 1 mhz, 50% duty cycle) figure 7. waveform - output enable and disable time (f = 1 mhz, 50% duty cycle) package mechanical data st2149b 18/23 doc id 023310 rev 1 8 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack specifications, grade definitions and product status are available at: www.st.com . ecopack is an st trademark. figure 8. package outline for qfn12 (1.7 x 2.0 mm) - 0.40 mm pitch $ x % ) . $ % 8 ! 2 % ! c c c # 0 , ! . % 3 % ! 4 ) . ' e e e # . x # " / 4 4 / - 6 ) % 7 ! ! 0 ) . ) $ b b b # ! " d d d # e ) . $ % 8 ! 2 % ! $ x % x ? % 4 / 0 6 ) % 7 3 ) $ % 6 ) % 7 a a a # a a a # x x $ ! " . x b . x , ! - st2149b package mechanical data doc id 023310 rev 1 19/23 table 12. mechanical data for qfn12 (1.7 x 2.0 mm) - 0.40 mm pitch symbol dimensions mm. min. nom. max. a 0.45 0.50 0.55 a1 0.00 0.02 0.05 b 0.15 0.20 0.25 d 1.70 bsc e 2.00 bsc e 0.40 bsc l 0.35 0.45 0.55 aaa 0.05 bbb 0.07 ccc 0.10 ddd 0.05 eee 0.08 n 12 nd 1 ne 5 notes (1) , (2) 1. dimensioning and tolerance conform to asme y14.5m-1994. 2. all dimensions are in millimeters. 3. n is the total number of terminals. 4. the location of the terminal #1 identifier and terminal numbering convention conforms to jedec publication 95 spp-002. 5. nd and ne refer to the number of terminals on the d and e side respectively. 6. dimension b applies to the metallized terminal. if the terminal has the optional radius on the other end of the terminal, dimension b should not be measured in that radius area. 7. coplanarity applies to the terminals and all other bottom surface metallization. 8. nj in the variation code refers to a package which is not currently jedec registered. lf part no. - lf dwg. no. b-2888 package mechanical data st2149b 20/23 doc id 023310 rev 1 figure 9. carrier tape for qfn12 (1.7 x 2.0 mm) - 0.40 mm pitch 1. measured from centerline of sprocket hole to centerline of pocket. 2. cumulative tolerance of sprocket holes is 0.20. 3. measured from centerline of sprocket hole to centerline of pocket. 4. other material available. 5. all dimensions are in millimeters unless otherwise stated. ! - $ ? 0 ? 9 $ ? m i n 2 t y p 9 0 4 ? 2 m a x # , " ? + 3 e c t i o n 9 9 ' % ? 7 % & |